#ifndef INCLUDED_CMSIS_H #define INCLUDED_CMSIS_H #ifndef INCLUDED_STDINT_H #define INCLUDED_STDINT_H #include #endif /*INCLUDED_STDINT_H*/ /* ------------------------------------------------------------------------------------------------------------------ */ /* */ #define __CORTEX_M (0x03) /*!< Cortex core */ #if defined (__ICCARM__) #include /* IAR Intrinsics */ #endif /** * IO definitions * * define access restrictions to peripheral registers */ #ifdef __cplusplus #define __I volatile /*!< defines 'read only' permissions */ #else #define __I volatile const /*!< defines 'read only' permissions */ #endif /* __cplusplus */ #define __O volatile /*!< defines 'write only' permissions */ #define __IO volatile /*!< defines 'read / write' permissions */ /* ################### Compiler specific Intrinsics ########################### */ #if defined ( __CC_ARM ) #define __ASM __asm /*!< asm keyword for ARM Compiler */ #define __INLINE __inline /*!< inline keyword for ARM Compiler */ #elif defined ( __ICCARM__ ) #define __ASM __asm /*!< asm keyword for IAR Compiler */ #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ #elif defined ( __GNUC__ ) #define __ASM __asm /*!< asm keyword for GNU Compiler */ #define __INLINE inline /*!< inline keyword for GNU Compiler */ #elif defined ( __TASKING__ ) #define __ASM __asm /*!< asm keyword for TASKING Compiler */ #define __INLINE inline /*!< inline keyword for TASKING Compiler */ #endif #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ /* ARM armcc specific functions */ #define CMSIS_enable_fault_irq __enable_fiq #define CMSIS_disable_fault_irq __disable_fiq #define CMSIS_enable_irq __enable_irq #define CMSIS_disable_irq __disable_irq #define CMSIS_NOP __nop #define CMSIS_WFI __wfi #define CMSIS_WFE __wfe #define CMSIS_SEV __sev #define CMSIS_ISB() __isb(0) #define CMSIS_DSB() __dsb(0) #define CMSIS_DMB() __dmb(0) #define CMSIS_REV __rev #define CMSIS_RBIT __rbit #define CMSIS_LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) #define CMSIS_LDREXH(ptr) ((unsigned short) __ldrex(ptr)) #define CMSIS_LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) #define CMSIS_STREXB(value, ptr) __strex(value, ptr) #define CMSIS_STREXH(value, ptr) __strex(value, ptr) #define CMSIS_STREXW(value, ptr) __strex(value, ptr) /* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ /* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ /* intrinsic void __enable_irq(); */ /* intrinsic void __disable_irq(); */ extern uint32_t CMSIS_get_IPSR(void); /** * @brief Return the Process Stack Pointer * * @return ProcessStackPointer * * Return the actual process stack pointer */ extern uint32_t CMSIS_get_PSP(void); /** * @brief Set the Process Stack Pointer * * @param topOfProcStack Process Stack Pointer * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ extern void CMSIS_set_PSP(uint32_t topOfProcStack); /** * @brief Return the Main Stack Pointer * * @return Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ extern uint32_t CMSIS_get_MSP(void); /** * @brief Set the Main Stack Pointer * * @param topOfMainStack Main Stack Pointer * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ extern void CMSIS_set_MSP(uint32_t topOfMainStack); /** * @brief Reverse byte order in unsigned short value * * @param value value to reverse * @return reversed value * * Reverse byte order in unsigned short value */ extern uint32_t CMSIS_REV16(uint16_t value); /** * @brief Reverse byte order in signed short value with sign extension to integer * * @param value value to reverse * @return reversed value * * Reverse byte order in signed short value with sign extension to integer */ extern int32_t CMSIS_REVSH(int16_t value); #if (__ARMCC_VERSION < 400000) /** * @brief Remove the exclusive lock created by ldrex * * Removes the exclusive lock which is created by ldrex. */ extern void CMSIS_CLREX(void); /** * @brief Return the Base Priority value * * @return BasePriority * * Return the content of the base priority register */ extern uint32_t CMSIS_get_BASEPRI(void); /** * @brief Set the Base Priority value * * @param basePri BasePriority * * Set the base priority register */ extern void CMSIS_set_BASEPRI(uint32_t basePri); /** * @brief Return the Priority Mask value * * @return PriMask * * Return state of the priority mask bit from the priority mask register */ extern uint32_t CMSIS_get_PRIMASK(void); /** * @brief Set the Priority Mask value * * @param priMask PriMask * * Set the priority mask bit in the priority mask register */ extern void CMSIS_set_PRIMASK(uint32_t priMask); /** * @brief Return the Fault Mask value * * @return FaultMask * * Return the content of the fault mask register */ extern uint32_t CMSIS_get_FAULTMASK(void); /** * @brief Set the Fault Mask value * * @param faultMask faultMask value * * Set the fault mask register */ extern void CMSIS_set_FAULTMASK(uint32_t faultMask); /** * @brief Return the Control Register value * * @return Control value * * Return the content of the control register */ extern uint32_t CMSIS_get_CONTROL(void); /** * @brief Set the Control Register value * * @param control Control value * * Set the control register */ extern void CMSIS_set_CONTROL(uint32_t control); #else /* (__ARMCC_VERSION >= 400000) */ /** * @brief Remove the exclusive lock created by ldrex * * Removes the exclusive lock which is created by ldrex. */ #define CMSIS_CLREX __clrex /** * @brief Return the Base Priority value * * @return BasePriority * * Return the content of the base priority register */ static __INLINE uint32_t CMSIS_get_BASEPRI(void) { register uint32_t __regBasePri __ASM("basepri"); return(__regBasePri); } /** * @brief Set the Base Priority value * * @param basePri BasePriority * * Set the base priority register */ static __INLINE void CMSIS_set_BASEPRI(uint32_t basePri) { register uint32_t __regBasePri __ASM("basepri"); __regBasePri = (basePri & 0xff); } /** * @brief Return the Priority Mask value * * @return PriMask * * Return state of the priority mask bit from the priority mask register */ static __INLINE uint32_t CMSIS_get_PRIMASK(void) { register uint32_t __regPriMask __ASM("primask"); return(__regPriMask); } /** * @brief Set the Priority Mask value * * @param priMask PriMask * * Set the priority mask bit in the priority mask register */ static __INLINE void CMSIS_set_PRIMASK(uint32_t priMask) { register uint32_t __regPriMask __ASM("primask"); __regPriMask = (priMask); } /** * @brief Return the Fault Mask value * * @return FaultMask * * Return the content of the fault mask register */ static __INLINE uint32_t CMSIS_get_FAULTMASK(void) { register uint32_t __regFaultMask __ASM("faultmask"); return(__regFaultMask); } /** * @brief Set the Fault Mask value * * @param faultMask faultMask value * * Set the fault mask register */ static __INLINE void CMSIS_set_FAULTMASK(uint32_t faultMask) { register uint32_t __regFaultMask __ASM("faultmask"); __regFaultMask = (faultMask & 1); } /** * @brief Return the Control Register value * * @return Control value * * Return the content of the control register */ static __INLINE uint32_t CMSIS_get_CONTROL(void) { register uint32_t __regControl __ASM("control"); return(__regControl); } /** * @brief Set the Control Register value * * @param control Control value * * Set the control register */ static __INLINE void CMSIS_set_CONTROL(uint32_t control) { register uint32_t __regControl __ASM("control"); __regControl = control; } #endif /* __ARMCC_VERSION */ #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ /* IAR iccarm specific functions */ #define CMSIS_enable_irq __enable_interrupt /*!< global Interrupt enable */ #define CMSIS_disable_irq __disable_interrupt /*!< global Interrupt disable */ static __INLINE void CMSIS_enable_fault_irq() { __ASM ("cpsie f"); } static __INLINE void CMSIS_disable_fault_irq() { __ASM ("cpsid f"); } #define CMSIS_NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ static __INLINE void CMSIS_WFI() { __ASM ("wfi"); } static __INLINE void CMSIS_WFE() { __ASM ("wfe"); } static __INLINE void CMSIS_SEV() { __ASM ("sev"); } static __INLINE void CMSIS_CLREX() { __ASM ("clrex"); } /* intrinsic void CMSIS_ISB(void) */ /* intrinsic void CMSIS_DSB(void) */ /* intrinsic void CMSIS_DMB(void) */ /* intrinsic void CMSIS_set_PRIMASK(); */ /* intrinsic void CMSIS_get_PRIMASK(); */ /* intrinsic void CMSIS_set_FAULTMASK(); */ /* intrinsic void CMSIS_get_FAULTMASK(); */ /* intrinsic uint32_t CMSIS_REV(uint32_t value); */ /* intrinsic uint32_t CMSIS_REVSH(uint32_t value); */ /* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ /* intrinsic unsigned long __LDREX(unsigned long *); */ /** * @brief Return the Process Stack Pointer * * @return ProcessStackPointer * * Return the actual process stack pointer */ extern uint32_t CMSIS_get_PSP(void); /** * @brief Set the Process Stack Pointer * * @param topOfProcStack Process Stack Pointer * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ extern void CMSIS_set_PSP(uint32_t topOfProcStack); /** * @brief Return the Main Stack Pointer * * @return Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ extern uint32_t CMSIS_get_MSP(void); /** * @brief Set the Main Stack Pointer * * @param topOfMainStack Main Stack Pointer * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ extern void CMSIS_set_MSP(uint32_t topOfMainStack); /** * @brief Reverse byte order in unsigned short value * * @param value value to reverse * @return reversed value * * Reverse byte order in unsigned short value */ extern uint32_t CMSIS_REV16(uint16_t value); /** * @brief Reverse bit order of value * * @param value value to reverse * @return reversed value * * Reverse bit order of value */ extern uint32_t CMSIS_RBIT(uint32_t value); /** * @brief LDR Exclusive (8 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 8 bit values) */ extern uint8_t CMSIS_LDREXB(uint8_t *addr); /** * @brief LDR Exclusive (16 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 16 bit values */ extern uint16_t CMSIS_LDREXH(uint16_t *addr); /** * @brief LDR Exclusive (32 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 32 bit values */ extern uint32_t CMSIS_LDREXW(uint32_t *addr); /** * @brief STR Exclusive (8 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 8 bit values */ extern uint32_t CMSIS_STREXB(uint8_t value, uint8_t *addr); /** * @brief STR Exclusive (16 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 16 bit values */ extern uint32_t CMSIS_STREXH(uint16_t value, uint16_t *addr); /** * @brief STR Exclusive (32 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 32 bit values */ extern uint32_t CMSIS_STREXW(uint32_t value, uint32_t *addr); #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ /* GNU gcc specific functions */ static __INLINE void CMSIS_enable_irq() { __ASM volatile ("cpsie i"); } static __INLINE void CMSIS_disable_irq() { __ASM volatile ("cpsid i"); } static __INLINE void CMSIS_enable_fault_irq() { __ASM volatile ("cpsie f"); } static __INLINE void CMSIS_disable_fault_irq() { __ASM volatile ("cpsid f"); } static __INLINE void CMSIS_NOP() { __ASM volatile ("nop"); } static __INLINE void CMSIS_WFI() { __ASM volatile ("wfi"); } static __INLINE void CMSIS_WFE() { __ASM volatile ("wfe"); } static __INLINE void CMSIS_SEV() { __ASM volatile ("sev"); } static __INLINE void CMSIS_ISB() { __ASM volatile ("isb"); } static __INLINE void CMSIS_DSB() { __ASM volatile ("dsb"); } static __INLINE void CMSIS_DMB() { __ASM volatile ("dmb"); } static __INLINE void CMSIS_CLREX() { __ASM volatile ("clrex"); } extern uint32_t CMSIS_get_IPSR(void); /** * @brief Return the Process Stack Pointer * * @return ProcessStackPointer * * Return the actual process stack pointer */ extern uint32_t CMSIS_get_PSP(void); /** * @brief Set the Process Stack Pointer * * @param topOfProcStack Process Stack Pointer * * Assign the value ProcessStackPointer to the MSP * (process stack pointer) Cortex processor register */ extern void CMSIS_set_PSP(uint32_t topOfProcStack); /** * @brief Return the Main Stack Pointer * * @return Main Stack Pointer * * Return the current value of the MSP (main stack pointer) * Cortex processor register */ extern uint32_t CMSIS_get_MSP(void); /** * @brief Set the Main Stack Pointer * * @param topOfMainStack Main Stack Pointer * * Assign the value mainStackPointer to the MSP * (main stack pointer) Cortex processor register */ extern void CMSIS_set_MSP(uint32_t topOfMainStack); /** * @brief Return the Base Priority value * * @return BasePriority * * Return the content of the base priority register */ extern uint32_t CMSIS_get_BASEPRI(void); /** * @brief Set the Base Priority value * * @param basePri BasePriority * * Set the base priority register */ extern void CMSIS_set_BASEPRI(uint32_t basePri); /** * @brief Return the Priority Mask value * * @return PriMask * * Return state of the priority mask bit from the priority mask register */ extern uint32_t CMSIS_get_PRIMASK(void); /** * @brief Set the Priority Mask value * * @param priMask PriMask * * Set the priority mask bit in the priority mask register */ extern void CMSIS_set_PRIMASK(uint32_t priMask); /** * @brief Return the Fault Mask value * * @return FaultMask * * Return the content of the fault mask register */ extern uint32_t CMSIS_get_FAULTMASK(void); /** * @brief Set the Fault Mask value * * @param faultMask faultMask value * * Set the fault mask register */ extern void CMSIS_set_FAULTMASK(uint32_t faultMask); /** * @brief Return the Control Register value * * @return Control value * * Return the content of the control register */ extern uint32_t CMSIS_get_CONTROL(void); /** * @brief Set the Control Register value * * @param control Control value * * Set the control register */ extern void CMSIS_set_CONTROL(uint32_t control); /** * @brief Reverse byte order in integer value * * @param value value to reverse * @return reversed value * * Reverse byte order in integer value */ extern uint32_t CMSIS_REV(uint32_t value); /** * @brief Reverse byte order in unsigned short value * * @param value value to reverse * @return reversed value * * Reverse byte order in unsigned short value */ extern uint32_t CMSIS_REV16(uint16_t value); /** * @brief Reverse byte order in signed short value with sign extension to integer * * @param value value to reverse * @return reversed value * * Reverse byte order in signed short value with sign extension to integer */ extern int32_t CMSIS_REVSH(int16_t value); /** * @brief Reverse bit order of value * * @param value value to reverse * @return reversed value * * Reverse bit order of value */ extern uint32_t CMSIS_RBIT(uint32_t value); /** * @brief LDR Exclusive (8 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 8 bit value */ extern uint8_t CMSIS_LDREXB(uint8_t *addr); /** * @brief LDR Exclusive (16 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 16 bit values */ extern uint16_t CMSIS_LDREXH(uint16_t *addr); /** * @brief LDR Exclusive (32 bit) * * @param *addr address pointer * @return value of (*address) * * Exclusive LDR command for 32 bit values */ extern uint32_t CMSIS_LDREXW(uint32_t *addr); /** * @brief STR Exclusive (8 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 8 bit values */ extern uint32_t CMSIS_STREXB(uint8_t value, uint8_t *addr); /** * @brief STR Exclusive (16 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 16 bit values */ extern uint32_t CMSIS_STREXH(uint16_t value, uint16_t *addr); /** * @brief STR Exclusive (32 bit) * * @param value value to store * @param *addr address pointer * @return successful / failed * * Exclusive STR command for 32 bit values */ extern uint32_t CMSIS_STREXW(uint32_t value, uint32_t *addr); #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ /* TASKING carm specific functions */ /* * The CMSIS functions have been implemented as intrinsics in the compiler. * Please use "carm -?i" to get an up to date list of all instrinsics, * Including the CMSIS ones. */ #endif #endif /*INCLUDED_CMSIS_H*/