#ifndef INCLUDED_CPU_H #define INCLUDED_CPU_H #ifndef INCLUDED_CH32V10X_H #define INCLUDED_CH32V10X_H #include #endif /*INCLUDED_CH32V10X_H*/ #ifndef INCLUDED_OS_TYPES_H #include #endif /*INCLUDED_OS_TYPES_H*/ #ifndef INCLUDED_OS_COMPILER_H #include #endif /*INCLUDED_OS_COMPILER_H*/ /* ------------------------------------------------------------------------------------------------------------------ */ /* */ #define CPU_KEY1 0xFA05 #define CPU_KEY2 0xBCAF #define CPU_KEY3 0xBEEF /* ------------------------------------------------------------------------------------------------------------------ */ /* */ OS_STATIC_FORCE_INLINE os_uint_t cpu_save_disable_irq_in_isr(void){ os_uint_t result; __asm volatile ("csrrw %0, mstatus, %1" :"=r"(result) :"r"(0x1800) :"memory"); return result; } OS_STATIC_FORCE_INLINE void cpu_restore_irq_in_isr(os_uint_t value){ __set_MSTATUS(value); } #define os_port_disable_irq __disable_irq #define os_port_enable_irq __enable_irq #define os_port_save_disable_irq_in_isr cpu_save_disable_irq_in_isr #define os_port_restore_irq_in_isr cpu_restore_irq_in_isr #define os_port_save_disable_irq cpu_save_disable_irq_in_isr #define os_port_restore_irq cpu_restore_irq_in_isr OS_STATIC_FORCE_INLINE void cpu_set_isr_sp(void){ __asm volatile("csrrw sp,mscratch,sp"); } OS_STATIC_FORCE_INLINE void cpu_set_task_sp(void){ __asm volatile("csrrw sp,mscratch,sp"); } #endif /*INCLUDED_CPU_H*/