CH32V10X 适配

This commit is contained in:
2026-05-28 15:23:19 +08:00
parent dc144a5cf4
commit e5a2334bb6
3 changed files with 379 additions and 285 deletions
+324 -219
View File
@@ -33,220 +33,286 @@ cpu_clz:
#endif
.section .text.os_port_context_switch_to,"ax",%progbits
.align 8
.align 2
.func
.global os_port_context_switch_to
.extern os_port_on_switch_success
os_port_context_switch_to:
/* machine mode, disable ISR */
li t0, 0x1800
csrw mstatus, t0
li t0, 0x1800
csrw mstatus, t0 // 1.
/* first save interrupt stack */
la t0, _eusrstack
addi t0, t0, -512
csrw mscratch,t0
/* 设置中断栈/系统栈空间 */
la t0, _eusrstack
addi t0, t0, -512
csrw mscratch, t0 // mscratch
/* restore sp */
LOAD sp, (a0)
/* =====================================================================
* C
* ===================================================================== */
jal os_port_on_switch_success // C 便
csrrw sp, mscratch, sp
jal os_port_on_switch_success
csrrw sp, mscratch, sp
/* =====================================================================
* SP
* ===================================================================== */
LOAD sp, 0(a0) // a0 &g_os_port_switch_to_sp sp
/* restore mstatus.MPIE */
LOAD a0, 0*REG_BYTES(sp)
csrs mstatus, a0
/* restore mepc */
LOAD a0, 2 * REG_BYTES(sp)
csrw mepc, a0
/* return address */
LOAD x1, 1 * REG_BYTES(sp)
LOAD x4, 4 * REG_BYTES(sp)
LOAD x5, 5 * REG_BYTES(sp)
LOAD x6, 6 * REG_BYTES(sp)
LOAD x7, 7 * REG_BYTES(sp)
LOAD x8, 8 * REG_BYTES(sp)
LOAD x9, 9 * REG_BYTES(sp)
LOAD x10, 10 * REG_BYTES(sp)
LOAD x11, 11 * REG_BYTES(sp)
LOAD x12, 12 * REG_BYTES(sp)
LOAD x13, 13 * REG_BYTES(sp)
LOAD x14, 14 * REG_BYTES(sp)
LOAD x15, 15 * REG_BYTES(sp)
LOAD x16, 16 * REG_BYTES(sp)
LOAD x17, 17 * REG_BYTES(sp)
LOAD x18, 18 * REG_BYTES(sp)
LOAD x19, 19 * REG_BYTES(sp)
LOAD x20, 20 * REG_BYTES(sp)
LOAD x21, 21 * REG_BYTES(sp)
LOAD x22, 22 * REG_BYTES(sp)
LOAD x23, 23 * REG_BYTES(sp)
LOAD x24, 24 * REG_BYTES(sp)
LOAD x25, 25 * REG_BYTES(sp)
LOAD x26, 26 * REG_BYTES(sp)
LOAD x27, 27 * REG_BYTES(sp)
LOAD x28, 28 * REG_BYTES(sp)
LOAD x29, 29 * REG_BYTES(sp)
LOAD x30, 30 * REG_BYTES(sp)
LOAD x31, 31 * REG_BYTES(sp)
addi sp, sp, CONTEXT_SIZE
/* load float reg */
#if (OS_CFG_CPU_MPU_PRESENT)
FLOAD f0, 0 * REG_BYTES(sp)
FLOAD f1, 1 * REG_BYTES(sp)
FLOAD f2, 2 * REG_BYTES(sp)
FLOAD f3, 3 * REG_BYTES(sp)
FLOAD f4, 4 * REG_BYTES(sp)
FLOAD f5, 5 * REG_BYTES(sp)
FLOAD f6, 6 * REG_BYTES(sp)
FLOAD f7, 7 * REG_BYTES(sp)
FLOAD f8, 8 * REG_BYTES(sp)
FLOAD f9, 9 * REG_BYTES(sp)
FLOAD f10, 10 * REG_BYTES(sp)
FLOAD f11, 11 * REG_BYTES(sp)
FLOAD f12, 12 * REG_BYTES(sp)
FLOAD f13, 13 * REG_BYTES(sp)
FLOAD f14, 14 * REG_BYTES(sp)
FLOAD f15, 15 * REG_BYTES(sp)
FLOAD f16, 16 * REG_BYTES(sp)
FLOAD f17, 17 * REG_BYTES(sp)
FLOAD f18, 18 * REG_BYTES(sp)
FLOAD f19, 19 * REG_BYTES(sp)
FLOAD f20, 20 * REG_BYTES(sp)
FLOAD f21, 21 * REG_BYTES(sp)
FLOAD f22, 22 * REG_BYTES(sp)
FLOAD f23, 23 * REG_BYTES(sp)
FLOAD f24, 24 * REG_BYTES(sp)
FLOAD f25, 25 * REG_BYTES(sp)
FLOAD f26, 26 * REG_BYTES(sp)
FLOAD f27, 27 * REG_BYTES(sp)
FLOAD f28, 28 * REG_BYTES(sp)
FLOAD f29, 29 * REG_BYTES(sp)
FLOAD f30, 30 * REG_BYTES(sp)
FLOAD f31, 31 * REG_BYTES(sp)
addi sp, sp, 32 * REG_BYTES
/* =====================================================================
* FPU
* MPU FPU
* ===================================================================== */
#if (OS_CFG_CPU_FPU_PRESENT)
FLOAD f0, (CONTEXT_SIZE + 0 * REG_BYTES)(sp)
FLOAD f1, (CONTEXT_SIZE + 1 * REG_BYTES)(sp)
FLOAD f2, (CONTEXT_SIZE + 2 * REG_BYTES)(sp)
FLOAD f3, (CONTEXT_SIZE + 3 * REG_BYTES)(sp)
FLOAD f4, (CONTEXT_SIZE + 4 * REG_BYTES)(sp)
FLOAD f5, (CONTEXT_SIZE + 5 * REG_BYTES)(sp)
FLOAD f6, (CONTEXT_SIZE + 6 * REG_BYTES)(sp)
FLOAD f7, (CONTEXT_SIZE + 7 * REG_BYTES)(sp)
FLOAD f8, (CONTEXT_SIZE + 8 * REG_BYTES)(sp)
FLOAD f9, (CONTEXT_SIZE + 9 * REG_BYTES)(sp)
FLOAD f10, (CONTEXT_SIZE + 10 * REG_BYTES)(sp)
FLOAD f11, (CONTEXT_SIZE + 11 * REG_BYTES)(sp)
FLOAD f12, (CONTEXT_SIZE + 12 * REG_BYTES)(sp)
FLOAD f13, (CONTEXT_SIZE + 13 * REG_BYTES)(sp)
FLOAD f14, (CONTEXT_SIZE + 14 * REG_BYTES)(sp)
FLOAD f15, (CONTEXT_SIZE + 15 * REG_BYTES)(sp)
FLOAD f16, (CONTEXT_SIZE + 16 * REG_BYTES)(sp)
FLOAD f17, (CONTEXT_SIZE + 17 * REG_BYTES)(sp)
FLOAD f18, (CONTEXT_SIZE + 18 * REG_BYTES)(sp)
FLOAD f19, (CONTEXT_SIZE + 19 * REG_BYTES)(sp)
FLOAD f20, (CONTEXT_SIZE + 20 * REG_BYTES)(sp)
FLOAD f21, (CONTEXT_SIZE + 21 * REG_BYTES)(sp)
FLOAD f22, (CONTEXT_SIZE + 22 * REG_BYTES)(sp)
FLOAD f23, (CONTEXT_SIZE + 23 * REG_BYTES)(sp)
FLOAD f24, (CONTEXT_SIZE + 24 * REG_BYTES)(sp)
FLOAD f25, (CONTEXT_SIZE + 25 * REG_BYTES)(sp)
FLOAD f26, (CONTEXT_SIZE + 26 * REG_BYTES)(sp)
FLOAD f27, (CONTEXT_SIZE + 27 * REG_BYTES)(sp)
FLOAD f28, (CONTEXT_SIZE + 28 * REG_BYTES)(sp)
FLOAD f29, (CONTEXT_SIZE + 29 * REG_BYTES)(sp)
FLOAD f30, (CONTEXT_SIZE + 30 * REG_BYTES)(sp)
FLOAD f31, (CONTEXT_SIZE + 31 * REG_BYTES)(sp)
#endif
/* =====================================================================
* t0
* ===================================================================== */
LOAD x1, 1 * REG_BYTES(sp)
LOAD x4, 4 * REG_BYTES(sp)
LOAD x6, 6 * REG_BYTES(sp)
LOAD x7, 7 * REG_BYTES(sp)
LOAD x8, 8 * REG_BYTES(sp)
LOAD x9, 9 * REG_BYTES(sp)
LOAD x10, 10 * REG_BYTES(sp)
LOAD x11, 11 * REG_BYTES(sp)
LOAD x12, 12 * REG_BYTES(sp)
LOAD x13, 13 * REG_BYTES(sp)
LOAD x14, 14 * REG_BYTES(sp)
LOAD x15, 15 * REG_BYTES(sp)
LOAD x16, 16 * REG_BYTES(sp)
LOAD x17, 17 * REG_BYTES(sp)
LOAD x18, 18 * REG_BYTES(sp)
LOAD x19, 19 * REG_BYTES(sp)
LOAD x20, 20 * REG_BYTES(sp)
LOAD x21, 21 * REG_BYTES(sp)
LOAD x22, 22 * REG_BYTES(sp)
LOAD x23, 23 * REG_BYTES(sp)
LOAD x24, 24 * REG_BYTES(sp)
LOAD x25, 25 * REG_BYTES(sp)
LOAD x26, 26 * REG_BYTES(sp)
LOAD x27, 27 * REG_BYTES(sp)
LOAD x28, 28 * REG_BYTES(sp)
LOAD x29, 29 * REG_BYTES(sp)
LOAD x30, 30 * REG_BYTES(sp)
LOAD x31, 31 * REG_BYTES(sp)
/* =====================================================================
* CSR
* ===================================================================== */
LOAD t0, 2 * REG_BYTES(sp) // PC mepc
csrw mepc, t0
LOAD t0, 0 * REG_BYTES(sp) // mstatus
csrw mstatus, t0 // csrw
LOAD x5, 5 * REG_BYTES(sp) // t0(x5)
/* =====================================================================
* 退
* ===================================================================== */
#if (OS_CFG_CPU_FPU_PRESENT)
addi sp, sp, (CONTEXT_SIZE + 32 * REG_BYTES)
#else
addi sp, sp, CONTEXT_SIZE
#endif
mret
.endfunc
.section .text.SW_Handler,"ax",%progbits
.align 8
.align 2
.func
.global SW_Handler
.extern g_os_port_switch_from_sp
.extern g_os_port_switch_to_sp
.extern os_isr_enter
.extern os_isr_leave
.extern os_port_on_switch_success
.extern g_t0
SW_Handler:
csrci mstatus, 0x08 // MIE = 0
/* =====================================================================
*
* ===================================================================== */
#if (OS_CFG_CPU_FPU_PRESENT)
addi sp, sp, -32 * REG_BYTES
FSTORE f0, 0 * REG_BYTES(sp)
FSTORE f1, 1 * REG_BYTES(sp)
FSTORE f2, 2 * REG_BYTES(sp)
FSTORE f3, 3 * REG_BYTES(sp)
FSTORE f4, 4 * REG_BYTES(sp)
FSTORE f5, 5 * REG_BYTES(sp)
FSTORE f6, 6 * REG_BYTES(sp)
FSTORE f7, 7 * REG_BYTES(sp)
FSTORE f8, 8 * REG_BYTES(sp)
FSTORE f9, 9 * REG_BYTES(sp)
FSTORE f10, 10 * REG_BYTES(sp)
FSTORE f11, 11 * REG_BYTES(sp)
FSTORE f12, 12 * REG_BYTES(sp)
FSTORE f13, 13 * REG_BYTES(sp)
FSTORE f14, 14 * REG_BYTES(sp)
FSTORE f15, 15 * REG_BYTES(sp)
FSTORE f16, 16 * REG_BYTES(sp)
FSTORE f17, 17 * REG_BYTES(sp)
FSTORE f18, 18 * REG_BYTES(sp)
FSTORE f19, 19 * REG_BYTES(sp)
FSTORE f20, 20 * REG_BYTES(sp)
FSTORE f21, 21 * REG_BYTES(sp)
FSTORE f22, 22 * REG_BYTES(sp)
FSTORE f23, 23 * REG_BYTES(sp)
FSTORE f24, 24 * REG_BYTES(sp)
FSTORE f25, 25 * REG_BYTES(sp)
FSTORE f26, 26 * REG_BYTES(sp)
FSTORE f27, 27 * REG_BYTES(sp)
FSTORE f28, 28 * REG_BYTES(sp)
FSTORE f29, 29 * REG_BYTES(sp)
FSTORE f30, 30 * REG_BYTES(sp)
FSTORE f31, 31 * REG_BYTES(sp)
addi sp, sp, -(CONTEXT_SIZE + 32 * REG_BYTES)
#else
addi sp, sp, -CONTEXT_SIZE
#endif
addi sp, sp, -CONTEXT_SIZE //
STORE t0, 5*REG_BYTES(sp) // t0
li t0, 0x80
STORE t0, 0 * REG_BYTES(sp) // MPIE
csrr t0, mepc
STORE t0, 2*REG_BYTES(sp) // pc
STORE x1, 1 * REG_BYTES(sp) // return address
STORE x4, 4 * REG_BYTES(sp)
STORE x6, 6 * REG_BYTES(sp)
STORE x7, 7 * REG_BYTES(sp)
STORE x8, 8 * REG_BYTES(sp)
STORE x9, 9 * REG_BYTES(sp)
STORE x10, 10 * REG_BYTES(sp)
STORE x11, 11 * REG_BYTES(sp)
STORE x12, 12 * REG_BYTES(sp)
STORE x13, 13 * REG_BYTES(sp)
STORE x14, 14 * REG_BYTES(sp)
STORE x15, 15 * REG_BYTES(sp)
STORE x16, 16 * REG_BYTES(sp)
STORE x17, 17 * REG_BYTES(sp)
STORE x18, 18 * REG_BYTES(sp)
STORE x19, 19 * REG_BYTES(sp)
STORE x20, 20 * REG_BYTES(sp)
STORE x21, 21 * REG_BYTES(sp)
STORE x22, 22 * REG_BYTES(sp)
STORE x23, 23 * REG_BYTES(sp)
STORE x24, 24 * REG_BYTES(sp)
STORE x25, 25 * REG_BYTES(sp)
STORE x26, 26 * REG_BYTES(sp)
STORE x27, 27 * REG_BYTES(sp)
STORE x28, 28 * REG_BYTES(sp)
STORE x29, 29 * REG_BYTES(sp)
STORE x30, 30 * REG_BYTES(sp)
STORE x31, 31 * REG_BYTES(sp)
la s0, g_os_port_switch_from_sp
LOAD s1, 0(s0)
STORE sp, 0(s1) // sp g_os_port_switch_from_sp
// isr stack
csrrw sp,mscratch,sp
jal os_port_on_switch_success
csrrw sp,mscratch,sp
la s0, g_os_port_switch_to_sp
LOAD s1, 0(s0)
LOAD sp, 0(s1) // sp g_os_port_switch_to_sp
LOAD a0, 2 * REG_BYTES(sp) // / mepc
csrw mepc, a0
LOAD x1, 1*REG_BYTES(sp)
/* =====================================================================
*
* ===================================================================== */
STORE x5, 5 * REG_BYTES(sp) // t0
li t0, 0x1800
csrs mstatus, t0 // M
csrw mstatus, t0 // M
LOAD t0, 0*REG_BYTES(sp) // mstatus
csrs mstatus, t0 // mstatus
li t0, 0x1880
STORE t0, 0 * REG_BYTES(sp) // MPIE
csrr t0, mepc
STORE t0, 2*REG_BYTES(sp) // pc
STORE x1, 1 * REG_BYTES(sp) // ra
STORE x4, 4 * REG_BYTES(sp) // tp
STORE x6, 6 * REG_BYTES(sp) // t1
STORE x7, 7 * REG_BYTES(sp) // t2
STORE x8, 8 * REG_BYTES(sp) // s0/fp
STORE x9, 9 * REG_BYTES(sp) // s1
STORE x10, 10 * REG_BYTES(sp) // a0
STORE x11, 11 * REG_BYTES(sp) // a1
STORE x12, 12 * REG_BYTES(sp) // a2
STORE x13, 13 * REG_BYTES(sp) // a3
STORE x14, 14 * REG_BYTES(sp) // a4
STORE x15, 15 * REG_BYTES(sp) // a5
STORE x16, 16 * REG_BYTES(sp) // a6
STORE x17, 17 * REG_BYTES(sp) // a7
STORE x18, 18 * REG_BYTES(sp) // s2
STORE x19, 19 * REG_BYTES(sp) // s3
STORE x20, 20 * REG_BYTES(sp) // s4
STORE x21, 21 * REG_BYTES(sp) // s5
STORE x22, 22 * REG_BYTES(sp) // s6
STORE x23, 23 * REG_BYTES(sp) // s7
STORE x24, 24 * REG_BYTES(sp) // s8
STORE x25, 25 * REG_BYTES(sp) // s9
STORE x26, 26 * REG_BYTES(sp) // s10
STORE x27, 27 * REG_BYTES(sp) // s11
STORE x28, 28 * REG_BYTES(sp) // t3
STORE x29, 29 * REG_BYTES(sp) // t4
STORE x30, 30 * REG_BYTES(sp) // t5
STORE x31, 31 * REG_BYTES(sp) // t6
/* =====================================================================
* FPU 使
* ===================================================================== */
#if (OS_CFG_CPU_FPU_PRESENT)
FSTORE f0, (CONTEXT_SIZE + 0 * REG_BYTES)(sp)
FSTORE f1, (CONTEXT_SIZE + 1 * REG_BYTES)(sp)
FSTORE f2, (CONTEXT_SIZE + 2 * REG_BYTES)(sp)
FSTORE f3, (CONTEXT_SIZE + 3 * REG_BYTES)(sp)
FSTORE f4, (CONTEXT_SIZE + 4 * REG_BYTES)(sp)
FSTORE f5, (CONTEXT_SIZE + 5 * REG_BYTES)(sp)
FSTORE f6, (CONTEXT_SIZE + 6 * REG_BYTES)(sp)
FSTORE f7, (CONTEXT_SIZE + 7 * REG_BYTES)(sp)
FSTORE f8, (CONTEXT_SIZE + 8 * REG_BYTES)(sp)
FSTORE f9, (CONTEXT_SIZE + 9 * REG_BYTES)(sp)
FSTORE f10, (CONTEXT_SIZE + 10 * REG_BYTES)(sp)
FSTORE f11, (CONTEXT_SIZE + 11 * REG_BYTES)(sp)
FSTORE f12, (CONTEXT_SIZE + 12 * REG_BYTES)(sp)
FSTORE f13, (CONTEXT_SIZE + 13 * REG_BYTES)(sp)
FSTORE f14, (CONTEXT_SIZE + 14 * REG_BYTES)(sp)
FSTORE f15, (CONTEXT_SIZE + 15 * REG_BYTES)(sp)
FSTORE f16, (CONTEXT_SIZE + 16 * REG_BYTES)(sp)
FSTORE f17, (CONTEXT_SIZE + 17 * REG_BYTES)(sp)
FSTORE f18, (CONTEXT_SIZE + 18 * REG_BYTES)(sp)
FSTORE f19, (CONTEXT_SIZE + 19 * REG_BYTES)(sp)
FSTORE f20, (CONTEXT_SIZE + 20 * REG_BYTES)(sp)
FSTORE f21, (CONTEXT_SIZE + 21 * REG_BYTES)(sp)
FSTORE f22, (CONTEXT_SIZE + 22 * REG_BYTES)(sp)
FSTORE f23, (CONTEXT_SIZE + 23 * REG_BYTES)(sp)
FSTORE f24, (CONTEXT_SIZE + 24 * REG_BYTES)(sp)
FSTORE f25, (CONTEXT_SIZE + 25 * REG_BYTES)(sp)
FSTORE f26, (CONTEXT_SIZE + 26 * REG_BYTES)(sp)
FSTORE f27, (CONTEXT_SIZE + 27 * REG_BYTES)(sp)
FSTORE f28, (CONTEXT_SIZE + 28 * REG_BYTES)(sp)
FSTORE f29, (CONTEXT_SIZE + 29 * REG_BYTES)(sp)
FSTORE f30, (CONTEXT_SIZE + 30 * REG_BYTES)(sp)
FSTORE f31, (CONTEXT_SIZE + 31 * REG_BYTES)(sp)
#endif
/* =====================================================================
* sp
* ===================================================================== */
la t0, g_os_port_switch_from_sp
LOAD t0, 0(t0)
STORE sp, 0(t0) // sp g_os_port_switch_from_sp
// C
jal os_port_on_switch_success
/* =====================================================================
* SP
* ===================================================================== */
la t0, g_os_port_switch_to_sp
LOAD t0, 0(t0)
LOAD sp, 0(t0) // sp g_os_port_switch_to_sp
/* =====================================================================
* FPU
* ===================================================================== */
#if (OS_CFG_CPU_FPU_PRESENT)
FLOAD f0, (CONTEXT_SIZE + 0 * REG_BYTES)(sp)
FLOAD f1, (CONTEXT_SIZE + 1 * REG_BYTES)(sp)
FLOAD f2, (CONTEXT_SIZE + 2 * REG_BYTES)(sp)
FLOAD f3, (CONTEXT_SIZE + 3 * REG_BYTES)(sp)
FLOAD f4, (CONTEXT_SIZE + 4 * REG_BYTES)(sp)
FLOAD f5, (CONTEXT_SIZE + 5 * REG_BYTES)(sp)
FLOAD f6, (CONTEXT_SIZE + 6 * REG_BYTES)(sp)
FLOAD f7, (CONTEXT_SIZE + 7 * REG_BYTES)(sp)
FLOAD f8, (CONTEXT_SIZE + 8 * REG_BYTES)(sp)
FLOAD f9, (CONTEXT_SIZE + 9 * REG_BYTES)(sp)
FLOAD f10, (CONTEXT_SIZE + 10 * REG_BYTES)(sp)
FLOAD f11, (CONTEXT_SIZE + 11 * REG_BYTES)(sp)
FLOAD f12, (CONTEXT_SIZE + 12 * REG_BYTES)(sp)
FLOAD f13, (CONTEXT_SIZE + 13 * REG_BYTES)(sp)
FLOAD f14, (CONTEXT_SIZE + 14 * REG_BYTES)(sp)
FLOAD f15, (CONTEXT_SIZE + 15 * REG_BYTES)(sp)
FLOAD f16, (CONTEXT_SIZE + 16 * REG_BYTES)(sp)
FLOAD f17, (CONTEXT_SIZE + 17 * REG_BYTES)(sp)
FLOAD f18, (CONTEXT_SIZE + 18 * REG_BYTES)(sp)
FLOAD f19, (CONTEXT_SIZE + 19 * REG_BYTES)(sp)
FLOAD f20, (CONTEXT_SIZE + 20 * REG_BYTES)(sp)
FLOAD f21, (CONTEXT_SIZE + 21 * REG_BYTES)(sp)
FLOAD f22, (CONTEXT_SIZE + 22 * REG_BYTES)(sp)
FLOAD f23, (CONTEXT_SIZE + 23 * REG_BYTES)(sp)
FLOAD f24, (CONTEXT_SIZE + 24 * REG_BYTES)(sp)
FLOAD f25, (CONTEXT_SIZE + 25 * REG_BYTES)(sp)
FLOAD f26, (CONTEXT_SIZE + 26 * REG_BYTES)(sp)
FLOAD f27, (CONTEXT_SIZE + 27 * REG_BYTES)(sp)
FLOAD f28, (CONTEXT_SIZE + 28 * REG_BYTES)(sp)
FLOAD f29, (CONTEXT_SIZE + 29 * REG_BYTES)(sp)
FLOAD f30, (CONTEXT_SIZE + 30 * REG_BYTES)(sp)
FLOAD f31, (CONTEXT_SIZE + 31 * REG_BYTES)(sp)
#endif
/* =====================================================================
* t0
* ===================================================================== */
LOAD x1, 1 * REG_BYTES(sp)
LOAD x4, 4 * REG_BYTES(sp)
LOAD x5, 5 * REG_BYTES(sp)
// LOAD x5, 5 * REG_BYTES(sp) // t0
LOAD x6, 6 * REG_BYTES(sp)
LOAD x7, 7 * REG_BYTES(sp)
LOAD x8, 8 * REG_BYTES(sp)
@@ -273,49 +339,88 @@ SW_Handler:
LOAD x29, 29 * REG_BYTES(sp)
LOAD x30, 30 * REG_BYTES(sp)
LOAD x31, 31 * REG_BYTES(sp)
addi sp, sp, CONTEXT_SIZE //
/* load float reg */
/* =====================================================================
* CSR
* ===================================================================== */
LOAD t0, 2 * REG_BYTES(sp) // mepc
csrw mepc, t0
LOAD t0, 0 * REG_BYTES(sp) // mstatus
csrw mstatus, t0
LOAD x5, 5 * REG_BYTES(sp) // t0
/* =====================================================================
* 退
* ===================================================================== */
#if (OS_CFG_CPU_FPU_PRESENT)
FLOAD f0, 0 * REG_BYTES(sp)
FLOAD f1, 1 * REG_BYTES(sp)
FLOAD f2, 2 * REG_BYTES(sp)
FLOAD f3, 3 * REG_BYTES(sp)
FLOAD f4, 4 * REG_BYTES(sp)
FLOAD f5, 5 * REG_BYTES(sp)
FLOAD f6, 6 * REG_BYTES(sp)
FLOAD f7, 7 * REG_BYTES(sp)
FLOAD f8, 8 * REG_BYTES(sp)
FLOAD f9, 9 * REG_BYTES(sp)
FLOAD f10, 10 * REG_BYTES(sp)
FLOAD f11, 11 * REG_BYTES(sp)
FLOAD f12, 12 * REG_BYTES(sp)
FLOAD f13, 13 * REG_BYTES(sp)
FLOAD f14, 14 * REG_BYTES(sp)
FLOAD f15, 15 * REG_BYTES(sp)
FLOAD f16, 16 * REG_BYTES(sp)
FLOAD f17, 17 * REG_BYTES(sp)
FLOAD f18, 18 * REG_BYTES(sp)
FLOAD f19, 19 * REG_BYTES(sp)
FLOAD f20, 20 * REG_BYTES(sp)
FLOAD f21, 21 * REG_BYTES(sp)
FLOAD f22, 22 * REG_BYTES(sp)
FLOAD f23, 23 * REG_BYTES(sp)
FLOAD f24, 24 * REG_BYTES(sp)
FLOAD f25, 25 * REG_BYTES(sp)
FLOAD f26, 26 * REG_BYTES(sp)
FLOAD f27, 27 * REG_BYTES(sp)
FLOAD f28, 28 * REG_BYTES(sp)
FLOAD f29, 29 * REG_BYTES(sp)
FLOAD f30, 30 * REG_BYTES(sp)
FLOAD f31, 31 * REG_BYTES(sp)
addi sp, sp, 32 * REG_BYTES
addi sp, sp, (CONTEXT_SIZE + 32 * REG_BYTES)
#else
addi sp, sp, CONTEXT_SIZE
#endif
/* mret
* 1. mstatus.MPIE (1) mstatus.MIE
* 2. mepc */
mret // M 退
.endfunc
.section .text.SysTick_Handler,"ax",%progbits
.align 2
.global SysTick_Handler
.extern SysTick_Handler_C
.func
SysTick_Handler:
// csrci mstatus, 8 //
/* 1. 因为是硬件中断,先在当前栈上保存必要的临时寄存器(Caller-saved) */
addi sp, sp, -16 * REG_BYTES
STORE x1, 0 * REG_BYTES(sp) # ra
STORE x5, 1 * REG_BYTES(sp) # t0
STORE x6, 2 * REG_BYTES(sp) # t1
STORE x7, 3 * REG_BYTES(sp) # t2
STORE x10, 4 * REG_BYTES(sp) # a0
STORE x11, 5 * REG_BYTES(sp) # a1
STORE x12, 6 * REG_BYTES(sp) # a2
STORE x13, 7 * REG_BYTES(sp) # a3
STORE x14, 8 * REG_BYTES(sp) # a4
STORE x15, 9 * REG_BYTES(sp) # a5
STORE x16, 10 * REG_BYTES(sp) # a6
STORE x17, 11 * REG_BYTES(sp) # a7
STORE x28, 12 * REG_BYTES(sp) # t3
STORE x29, 13 * REG_BYTES(sp) # t4
STORE x30, 14 * REG_BYTES(sp) # t5
STORE x31, 15 * REG_BYTES(sp) # t6
/* 2. 清除定时器硬件中断标志位(防止重复触发),并调用 C 语言的时钟处理函数 */
jal SysTick_Handler_C
/* 3. 恢复临时寄存器 */
LOAD x1, 0 * REG_BYTES(sp) # ra
LOAD x5, 1 * REG_BYTES(sp) # t0
LOAD x6, 2 * REG_BYTES(sp) # t1
LOAD x7, 3 * REG_BYTES(sp) # t2
LOAD x10, 4 * REG_BYTES(sp) # a0
LOAD x11, 5 * REG_BYTES(sp) # a1
LOAD x12, 6 * REG_BYTES(sp) # a2
LOAD x13, 7 * REG_BYTES(sp) # a3
LOAD x14, 8 * REG_BYTES(sp) # a4
LOAD x15, 9 * REG_BYTES(sp) # a5
LOAD x16, 10 * REG_BYTES(sp) # a6
LOAD x17, 11 * REG_BYTES(sp) # a7
LOAD x28, 12 * REG_BYTES(sp) # t3
LOAD x29, 13 * REG_BYTES(sp) # t4
LOAD x30, 14 * REG_BYTES(sp) # t5
LOAD x31, 15 * REG_BYTES(sp) # t6
addi sp, sp, 16 * REG_BYTES
/* 4. 退出硬件中断 */
mret
.endfunc
.align 4
.end