移植到 CH32V10x 既 QingKeV3 系列 MCU 上
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#ifndef INCLUDED_RISCV_H
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#define INCLUDED_RISCV_H
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#ifndef INCLUDED_OS_TYPES_H
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#include <os_types.h>
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#endif /*INCLUDED_OS_TYPES_H*/
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#ifndef INCLUDED_OS_COMPILER_H
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#include <os_compiler.h>
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#endif /*INCLUDED_OS_COMPILER_H*/
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/* ------------------------------------------------------------------------------------------------------------------ */
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/* */
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OS_STATIC_FORCE_INLINE
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void RISCV_enable_irq()
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{
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__asm volatile ("csrs mstatus, %0" : : "r" (0x88) );
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}
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OS_STATIC_FORCE_INLINE
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void RISCV_disable_irq()
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{
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__asm volatile ("csrc mstatus, %0" : : "r" (0x88) );
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}
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OS_STATIC_FORCE_INLINE
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void RISCV_NOP()
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{
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__asm volatile ("nop");
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}
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/* ------------------------------------------------------------------------------------------------------------------ */
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/* */
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/*********************************************************************
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* @fn __AMOADD_W
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*
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* @brief Atomic Add with 32bit value
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* Atomically ADD 32bit value with value in memory using amoadd.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be ADDed
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*
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* @return return memory value + add value
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*/
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OS_STATIC_FORCE_INLINE
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int32_t RISCV_AMOADD_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amoadd.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOAND_W
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*
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* @brief Atomic And with 32bit value
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* Atomically AND 32bit value with value in memory using amoand.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be ANDed
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*
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* @return return memory value & and value
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*/
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OS_STATIC_FORCE_INLINE
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int32_t RISCV_AMOAND_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amoand.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOMAX_W
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*
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* @brief Atomic signed MAX with 32bit value
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* Atomically signed max compare 32bit value with value in memory using amomax.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be compared
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*
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* @return return the bigger value
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*/
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OS_STATIC_FORCE_INLINE
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int32_t RISCV_AMOMAX_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amomax.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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OS_STATIC_FORCE_INLINE
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uint32_t RISCV_AMOMAXU_W(volatile uint32_t *addr, uint32_t value)
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{
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uint32_t result;
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__asm volatile ("amomaxu.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOMIN_W
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*
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* @brief Atomic signed MIN with 32bit value
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* Atomically signed min compare 32bit value with value in memory using amomin.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be compared
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*
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* @return return the smaller value
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*/
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OS_STATIC_FORCE_INLINE
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int32_t RISCV_AMOMIN_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amomin.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOMINU_W
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*
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* @brief Atomic unsigned MIN with 32bit value
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* Atomically unsigned min compare 32bit value with value in memory using amominu.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be compared
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*
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* @return return the smaller value
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*/
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OS_STATIC_FORCE_INLINE
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uint32_t RISCV_AMOMINU_W(volatile uint32_t *addr, uint32_t value)
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{
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uint32_t result;
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__asm volatile ("amominu.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOOR_W
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*
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* @brief Atomic OR with 32bit value
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* Atomically OR 32bit value with value in memory using amoor.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be ORed
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*
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* @return return memory value | and value
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*/
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OS_STATIC_FORCE_INLINE
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int32_t RISCV_AMOOR_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amoor.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOSWAP_W
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*
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* @brief Atomically swap new 32bit value into memory using amoswap.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* newval - New value to be stored into the address
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*
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* @return return the original value in memory
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*/
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OS_STATIC_FORCE_INLINE
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uint32_t RISCV_AMOSWAP_W(volatile uint32_t *addr, uint32_t newval)
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{
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uint32_t result;
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__asm volatile ("amoswap.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(newval) : "memory");
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return result;
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}
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/*********************************************************************
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* @fn __AMOXOR_W
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*
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* @brief Atomic XOR with 32bit value
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* Atomically XOR 32bit value with value in memory using amoxor.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be XORed
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*
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* @return return memory value ^ and value
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*/
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OS_STATIC_FORCE_INLINE
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int32_t RISCV_AMOXOR_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amoxor.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/* ------------------------------------------------------------------------------------------------------------------ */
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/* */
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extern uint32_t RISCV_get_MSTATUS(void);
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extern void RISCV_set_MSTATUS(uint32_t value);
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extern uint32_t RISCV_get_MISA(void);
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extern void RISCV_set_MISA(uint32_t value);
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extern uint32_t RISCV_get_MTVEC(void);
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extern void RISCV_set_MTVEC(uint32_t value);
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extern uint32_t RISCV_get_MSCRATCH(void);
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extern void RISCV_set_MSCRATCH(uint32_t value);
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extern uint32_t RISCV_get_MEPC(void);
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extern void RISCV_set_MEPC(uint32_t value);
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extern uint32_t RISCV_get_MCAUSE(void);
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extern void RISCV_set_MCAUSE(uint32_t value);
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extern uint32_t RISCV_get_MTVAL(void);
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extern void RISCV_set_MTVAL(uint32_t value);
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extern uint32_t RISCV_get_MVENDORID(void);
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extern uint32_t RISCV_get_MARCHID(void);
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extern uint32_t RISCV_get_MIMPID(void);
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extern uint32_t RISCV_get_MHARTID(void);
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extern uint32_t RISCV_get_SP(void);
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#endif /*INCLUDED_RISCV_H*/
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