321 lines
9.1 KiB
ArmAsm
321 lines
9.1 KiB
ArmAsm
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#include "os_config.h"
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#if __riscv_xlen == 64
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#define REG_BYTES 8
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#define STORE sd
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#define LOAD ld
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#define FSTORE fsd
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#define FLOAD fld
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#elif __riscv_xlen == 32
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#define REG_BYTES 4
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#define STORE sw
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#define LOAD lw
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#define FSTORE fsw
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#define FLOAD flw
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#else
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#error Assembler did not define __riscv_xlen
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#endif
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#define CONTEXT_SIZE (32 * REG_BYTES)
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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//// CODE
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#ifdef OS_CFG_CPU_CLZ_ASM_PRESENT
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.section .text.cpu_clz,"ax",%progbits
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.align 8
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.func
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.global cpu_clz
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cpu_clz:
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clz a0, a0
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ret
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.endfunc
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#endif
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.section .text.os_port_context_switch_to,"ax",%progbits
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.align 8
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.func
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.global os_port_context_switch_to
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.extern os_port_on_switch_success
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os_port_context_switch_to:
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/* machine mode, disable ISR */
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li t0, 0x1800
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csrw mstatus, t0
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/* first save interrupt stack */
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la t0, _eusrstack
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addi t0, t0, -512
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csrw mscratch,t0
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/* restore sp */
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LOAD sp, (a0)
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csrrw sp, mscratch, sp
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jal os_port_on_switch_success
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csrrw sp, mscratch, sp
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/* restore mstatus.MPIE */
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LOAD a0, 0*REG_BYTES(sp)
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csrs mstatus, a0
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/* restore mepc */
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LOAD a0, 2 * REG_BYTES(sp)
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csrw mepc, a0
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/* return address */
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LOAD x1, 1 * REG_BYTES(sp)
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LOAD x4, 4 * REG_BYTES(sp)
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LOAD x5, 5 * REG_BYTES(sp)
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LOAD x6, 6 * REG_BYTES(sp)
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LOAD x7, 7 * REG_BYTES(sp)
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LOAD x8, 8 * REG_BYTES(sp)
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LOAD x9, 9 * REG_BYTES(sp)
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LOAD x10, 10 * REG_BYTES(sp)
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LOAD x11, 11 * REG_BYTES(sp)
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LOAD x12, 12 * REG_BYTES(sp)
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LOAD x13, 13 * REG_BYTES(sp)
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LOAD x14, 14 * REG_BYTES(sp)
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LOAD x15, 15 * REG_BYTES(sp)
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LOAD x16, 16 * REG_BYTES(sp)
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LOAD x17, 17 * REG_BYTES(sp)
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LOAD x18, 18 * REG_BYTES(sp)
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LOAD x19, 19 * REG_BYTES(sp)
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LOAD x20, 20 * REG_BYTES(sp)
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LOAD x21, 21 * REG_BYTES(sp)
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LOAD x22, 22 * REG_BYTES(sp)
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LOAD x23, 23 * REG_BYTES(sp)
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LOAD x24, 24 * REG_BYTES(sp)
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LOAD x25, 25 * REG_BYTES(sp)
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LOAD x26, 26 * REG_BYTES(sp)
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LOAD x27, 27 * REG_BYTES(sp)
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LOAD x28, 28 * REG_BYTES(sp)
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LOAD x29, 29 * REG_BYTES(sp)
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LOAD x30, 30 * REG_BYTES(sp)
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LOAD x31, 31 * REG_BYTES(sp)
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addi sp, sp, CONTEXT_SIZE
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/* load float reg */
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#if (OS_CFG_CPU_MPU_PRESENT)
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FLOAD f0, 0 * REG_BYTES(sp)
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FLOAD f1, 1 * REG_BYTES(sp)
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FLOAD f2, 2 * REG_BYTES(sp)
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FLOAD f3, 3 * REG_BYTES(sp)
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FLOAD f4, 4 * REG_BYTES(sp)
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FLOAD f5, 5 * REG_BYTES(sp)
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FLOAD f6, 6 * REG_BYTES(sp)
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FLOAD f7, 7 * REG_BYTES(sp)
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FLOAD f8, 8 * REG_BYTES(sp)
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FLOAD f9, 9 * REG_BYTES(sp)
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FLOAD f10, 10 * REG_BYTES(sp)
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FLOAD f11, 11 * REG_BYTES(sp)
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FLOAD f12, 12 * REG_BYTES(sp)
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FLOAD f13, 13 * REG_BYTES(sp)
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FLOAD f14, 14 * REG_BYTES(sp)
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FLOAD f15, 15 * REG_BYTES(sp)
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FLOAD f16, 16 * REG_BYTES(sp)
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FLOAD f17, 17 * REG_BYTES(sp)
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FLOAD f18, 18 * REG_BYTES(sp)
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FLOAD f19, 19 * REG_BYTES(sp)
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FLOAD f20, 20 * REG_BYTES(sp)
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FLOAD f21, 21 * REG_BYTES(sp)
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FLOAD f22, 22 * REG_BYTES(sp)
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FLOAD f23, 23 * REG_BYTES(sp)
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FLOAD f24, 24 * REG_BYTES(sp)
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FLOAD f25, 25 * REG_BYTES(sp)
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FLOAD f26, 26 * REG_BYTES(sp)
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FLOAD f27, 27 * REG_BYTES(sp)
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FLOAD f28, 28 * REG_BYTES(sp)
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FLOAD f29, 29 * REG_BYTES(sp)
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FLOAD f30, 30 * REG_BYTES(sp)
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FLOAD f31, 31 * REG_BYTES(sp)
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addi sp, sp, 32 * REG_BYTES
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#endif
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mret
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.endfunc
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.section .text.SW_Handler,"ax",%progbits
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.align 8
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.func
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.global SW_Handler
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.extern g_os_port_switch_from_sp
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.extern g_os_port_switch_to_sp
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.extern os_isr_enter
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.extern os_isr_leave
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.extern os_port_on_switch_success
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.extern g_t0
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SW_Handler:
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#if (OS_CFG_CPU_FPU_PRESENT)
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addi sp, sp, -32 * REG_BYTES
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FSTORE f0, 0 * REG_BYTES(sp)
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FSTORE f1, 1 * REG_BYTES(sp)
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FSTORE f2, 2 * REG_BYTES(sp)
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FSTORE f3, 3 * REG_BYTES(sp)
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FSTORE f4, 4 * REG_BYTES(sp)
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FSTORE f5, 5 * REG_BYTES(sp)
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FSTORE f6, 6 * REG_BYTES(sp)
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FSTORE f7, 7 * REG_BYTES(sp)
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FSTORE f8, 8 * REG_BYTES(sp)
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FSTORE f9, 9 * REG_BYTES(sp)
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FSTORE f10, 10 * REG_BYTES(sp)
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FSTORE f11, 11 * REG_BYTES(sp)
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FSTORE f12, 12 * REG_BYTES(sp)
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FSTORE f13, 13 * REG_BYTES(sp)
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FSTORE f14, 14 * REG_BYTES(sp)
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FSTORE f15, 15 * REG_BYTES(sp)
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FSTORE f16, 16 * REG_BYTES(sp)
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FSTORE f17, 17 * REG_BYTES(sp)
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FSTORE f18, 18 * REG_BYTES(sp)
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FSTORE f19, 19 * REG_BYTES(sp)
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FSTORE f20, 20 * REG_BYTES(sp)
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FSTORE f21, 21 * REG_BYTES(sp)
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FSTORE f22, 22 * REG_BYTES(sp)
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FSTORE f23, 23 * REG_BYTES(sp)
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FSTORE f24, 24 * REG_BYTES(sp)
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FSTORE f25, 25 * REG_BYTES(sp)
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FSTORE f26, 26 * REG_BYTES(sp)
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FSTORE f27, 27 * REG_BYTES(sp)
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FSTORE f28, 28 * REG_BYTES(sp)
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FSTORE f29, 29 * REG_BYTES(sp)
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FSTORE f30, 30 * REG_BYTES(sp)
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FSTORE f31, 31 * REG_BYTES(sp)
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#endif
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addi sp, sp, -CONTEXT_SIZE // 留出栈空间
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STORE t0, 5*REG_BYTES(sp) // 保存 t0
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li t0, 0x80
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STORE t0, 0 * REG_BYTES(sp) // 设置 MPIE
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csrr t0, mepc
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STORE t0, 2*REG_BYTES(sp) // 保存正在运行任务的 pc 指针
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STORE x1, 1 * REG_BYTES(sp) // return address
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STORE x4, 4 * REG_BYTES(sp)
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STORE x6, 6 * REG_BYTES(sp)
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STORE x7, 7 * REG_BYTES(sp)
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STORE x8, 8 * REG_BYTES(sp)
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STORE x9, 9 * REG_BYTES(sp)
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STORE x10, 10 * REG_BYTES(sp)
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STORE x11, 11 * REG_BYTES(sp)
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STORE x12, 12 * REG_BYTES(sp)
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STORE x13, 13 * REG_BYTES(sp)
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STORE x14, 14 * REG_BYTES(sp)
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STORE x15, 15 * REG_BYTES(sp)
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STORE x16, 16 * REG_BYTES(sp)
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STORE x17, 17 * REG_BYTES(sp)
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STORE x18, 18 * REG_BYTES(sp)
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STORE x19, 19 * REG_BYTES(sp)
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STORE x20, 20 * REG_BYTES(sp)
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STORE x21, 21 * REG_BYTES(sp)
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STORE x22, 22 * REG_BYTES(sp)
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STORE x23, 23 * REG_BYTES(sp)
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STORE x24, 24 * REG_BYTES(sp)
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STORE x25, 25 * REG_BYTES(sp)
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STORE x26, 26 * REG_BYTES(sp)
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STORE x27, 27 * REG_BYTES(sp)
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STORE x28, 28 * REG_BYTES(sp)
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STORE x29, 29 * REG_BYTES(sp)
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STORE x30, 30 * REG_BYTES(sp)
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STORE x31, 31 * REG_BYTES(sp)
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la s0, g_os_port_switch_from_sp
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LOAD s1, 0(s0)
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STORE sp, 0(s1) // 将 sp 存入 g_os_port_switch_from_sp
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// 切换到 isr stack
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csrrw sp,mscratch,sp
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jal os_port_on_switch_success
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csrrw sp,mscratch,sp
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la s0, g_os_port_switch_to_sp
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LOAD s1, 0(s0)
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LOAD sp, 0(s1) // 将 sp 指向 g_os_port_switch_to_sp 栈
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LOAD a0, 2 * REG_BYTES(sp) // 加载/恢复 mepc
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csrw mepc, a0
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LOAD x1, 1*REG_BYTES(sp)
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li t0, 0x1800
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csrs mstatus, t0 // 确保 M 模式
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LOAD t0, 0*REG_BYTES(sp) // 加载 mstatus
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csrs mstatus, t0 // 恢复 mstatus
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LOAD x4, 4 * REG_BYTES(sp)
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LOAD x5, 5 * REG_BYTES(sp)
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LOAD x6, 6 * REG_BYTES(sp)
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LOAD x7, 7 * REG_BYTES(sp)
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LOAD x8, 8 * REG_BYTES(sp)
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LOAD x9, 9 * REG_BYTES(sp)
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LOAD x10, 10 * REG_BYTES(sp)
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LOAD x11, 11 * REG_BYTES(sp)
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LOAD x12, 12 * REG_BYTES(sp)
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LOAD x13, 13 * REG_BYTES(sp)
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LOAD x14, 14 * REG_BYTES(sp)
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LOAD x15, 15 * REG_BYTES(sp)
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LOAD x16, 16 * REG_BYTES(sp)
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LOAD x17, 17 * REG_BYTES(sp)
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LOAD x18, 18 * REG_BYTES(sp)
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LOAD x19, 19 * REG_BYTES(sp)
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LOAD x20, 20 * REG_BYTES(sp)
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LOAD x21, 21 * REG_BYTES(sp)
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LOAD x22, 22 * REG_BYTES(sp)
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LOAD x23, 23 * REG_BYTES(sp)
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LOAD x24, 24 * REG_BYTES(sp)
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LOAD x25, 25 * REG_BYTES(sp)
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LOAD x26, 26 * REG_BYTES(sp)
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LOAD x27, 27 * REG_BYTES(sp)
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LOAD x28, 28 * REG_BYTES(sp)
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LOAD x29, 29 * REG_BYTES(sp)
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LOAD x30, 30 * REG_BYTES(sp)
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LOAD x31, 31 * REG_BYTES(sp)
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addi sp, sp, CONTEXT_SIZE // 恢复栈指针
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/* load float reg */
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#if (OS_CFG_CPU_FPU_PRESENT)
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FLOAD f0, 0 * REG_BYTES(sp)
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FLOAD f1, 1 * REG_BYTES(sp)
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FLOAD f2, 2 * REG_BYTES(sp)
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FLOAD f3, 3 * REG_BYTES(sp)
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FLOAD f4, 4 * REG_BYTES(sp)
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FLOAD f5, 5 * REG_BYTES(sp)
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FLOAD f6, 6 * REG_BYTES(sp)
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FLOAD f7, 7 * REG_BYTES(sp)
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FLOAD f8, 8 * REG_BYTES(sp)
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FLOAD f9, 9 * REG_BYTES(sp)
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FLOAD f10, 10 * REG_BYTES(sp)
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FLOAD f11, 11 * REG_BYTES(sp)
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FLOAD f12, 12 * REG_BYTES(sp)
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FLOAD f13, 13 * REG_BYTES(sp)
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FLOAD f14, 14 * REG_BYTES(sp)
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FLOAD f15, 15 * REG_BYTES(sp)
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FLOAD f16, 16 * REG_BYTES(sp)
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FLOAD f17, 17 * REG_BYTES(sp)
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FLOAD f18, 18 * REG_BYTES(sp)
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FLOAD f19, 19 * REG_BYTES(sp)
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FLOAD f20, 20 * REG_BYTES(sp)
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FLOAD f21, 21 * REG_BYTES(sp)
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FLOAD f22, 22 * REG_BYTES(sp)
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FLOAD f23, 23 * REG_BYTES(sp)
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FLOAD f24, 24 * REG_BYTES(sp)
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FLOAD f25, 25 * REG_BYTES(sp)
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FLOAD f26, 26 * REG_BYTES(sp)
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FLOAD f27, 27 * REG_BYTES(sp)
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FLOAD f28, 28 * REG_BYTES(sp)
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FLOAD f29, 29 * REG_BYTES(sp)
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FLOAD f30, 30 * REG_BYTES(sp)
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FLOAD f31, 31 * REG_BYTES(sp)
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addi sp, sp, 32 * REG_BYTES
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#endif
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mret // 从 M 模式退出
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.endfunc
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.align 4
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.end
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