740 lines
19 KiB
C
740 lines
19 KiB
C
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#ifndef INCLUDED_CMSIS_H
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#define INCLUDED_CMSIS_H
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#ifndef INCLUDED_STDINT_H
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#define INCLUDED_STDINT_H
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#include <stdint.h>
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#endif /*INCLUDED_STDINT_H*/
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/* ------------------------------------------------------------------------------------------------------------------ */
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/* */
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#define __CORTEX_M (0x03) /*!< Cortex core */
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#if defined (__ICCARM__)
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#include <intrinsics.h> /* IAR Intrinsics */
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#endif
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/**
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* IO definitions
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*
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* define access restrictions to peripheral registers
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*/
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#ifdef __cplusplus
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#define __I volatile /*!< defines 'read only' permissions */
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#else
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#define __I volatile const /*!< defines 'read only' permissions */
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#endif /* __cplusplus */
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#define __O volatile /*!< defines 'write only' permissions */
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#define __IO volatile /*!< defines 'read / write' permissions */
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/* ################### Compiler specific Intrinsics ########################### */
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#if defined ( __CC_ARM )
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#define __ASM __asm /*!< asm keyword for ARM Compiler */
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#define __INLINE __inline /*!< inline keyword for ARM Compiler */
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#elif defined ( __ICCARM__ )
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#define __ASM __asm /*!< asm keyword for IAR Compiler */
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#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
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#elif defined ( __GNUC__ )
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#define __ASM __asm /*!< asm keyword for GNU Compiler */
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#define __INLINE inline /*!< inline keyword for GNU Compiler */
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#elif defined ( __TASKING__ )
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#define __ASM __asm /*!< asm keyword for TASKING Compiler */
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#define __INLINE inline /*!< inline keyword for TASKING Compiler */
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#endif
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#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
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/* ARM armcc specific functions */
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#define CMSIS_enable_fault_irq __enable_fiq
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#define CMSIS_disable_fault_irq __disable_fiq
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#define CMSIS_enable_irq __enable_irq
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#define CMSIS_disable_irq __disable_irq
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#define CMSIS_NOP __nop
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#define CMSIS_WFI __wfi
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#define CMSIS_WFE __wfe
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#define CMSIS_SEV __sev
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#define CMSIS_ISB() __isb(0)
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#define CMSIS_DSB() __dsb(0)
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#define CMSIS_DMB() __dmb(0)
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#define CMSIS_REV __rev
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#define CMSIS_RBIT __rbit
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#define CMSIS_LDREXB(ptr) ((unsigned char ) __ldrex(ptr))
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#define CMSIS_LDREXH(ptr) ((unsigned short) __ldrex(ptr))
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#define CMSIS_LDREXW(ptr) ((unsigned int ) __ldrex(ptr))
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#define CMSIS_STREXB(value, ptr) __strex(value, ptr)
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#define CMSIS_STREXH(value, ptr) __strex(value, ptr)
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#define CMSIS_STREXW(value, ptr) __strex(value, ptr)
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/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */
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/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */
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/* intrinsic void __enable_irq(); */
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/* intrinsic void __disable_irq(); */
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extern uint32_t CMSIS_get_IPSR(void);
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/**
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* @brief Return the Process Stack Pointer
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*
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* @return ProcessStackPointer
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*
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* Return the actual process stack pointer
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*/
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extern uint32_t CMSIS_get_PSP(void);
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/**
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* @brief Set the Process Stack Pointer
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*
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* @param topOfProcStack Process Stack Pointer
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*
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* Assign the value ProcessStackPointer to the MSP
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* (process stack pointer) Cortex processor register
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*/
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extern void CMSIS_set_PSP(uint32_t topOfProcStack);
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/**
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* @brief Return the Main Stack Pointer
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*
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* @return Main Stack Pointer
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*
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* Return the current value of the MSP (main stack pointer)
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* Cortex processor register
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*/
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extern uint32_t CMSIS_get_MSP(void);
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/**
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* @brief Set the Main Stack Pointer
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*
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* @param topOfMainStack Main Stack Pointer
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*
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* Assign the value mainStackPointer to the MSP
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* (main stack pointer) Cortex processor register
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*/
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extern void CMSIS_set_MSP(uint32_t topOfMainStack);
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/**
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* @brief Reverse byte order in unsigned short value
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*
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* @param value value to reverse
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* @return reversed value
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*
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* Reverse byte order in unsigned short value
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*/
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extern uint32_t CMSIS_REV16(uint16_t value);
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/**
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* @brief Reverse byte order in signed short value with sign extension to integer
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*
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* @param value value to reverse
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* @return reversed value
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*
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* Reverse byte order in signed short value with sign extension to integer
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*/
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extern int32_t CMSIS_REVSH(int16_t value);
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#if (__ARMCC_VERSION < 400000)
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/**
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* @brief Remove the exclusive lock created by ldrex
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*
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* Removes the exclusive lock which is created by ldrex.
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*/
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extern void CMSIS_CLREX(void);
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/**
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* @brief Return the Base Priority value
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*
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* @return BasePriority
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*
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* Return the content of the base priority register
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*/
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extern uint32_t CMSIS_get_BASEPRI(void);
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/**
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* @brief Set the Base Priority value
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*
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* @param basePri BasePriority
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*
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* Set the base priority register
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*/
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extern void CMSIS_set_BASEPRI(uint32_t basePri);
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/**
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* @brief Return the Priority Mask value
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*
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* @return PriMask
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*
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* Return state of the priority mask bit from the priority mask register
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*/
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extern uint32_t CMSIS_get_PRIMASK(void);
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/**
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* @brief Set the Priority Mask value
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*
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* @param priMask PriMask
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*
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* Set the priority mask bit in the priority mask register
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*/
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extern void CMSIS_set_PRIMASK(uint32_t priMask);
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/**
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* @brief Return the Fault Mask value
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*
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* @return FaultMask
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*
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* Return the content of the fault mask register
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*/
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extern uint32_t CMSIS_get_FAULTMASK(void);
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/**
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* @brief Set the Fault Mask value
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*
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* @param faultMask faultMask value
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*
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* Set the fault mask register
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*/
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extern void CMSIS_set_FAULTMASK(uint32_t faultMask);
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/**
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* @brief Return the Control Register value
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*
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* @return Control value
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*
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* Return the content of the control register
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*/
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extern uint32_t CMSIS_get_CONTROL(void);
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/**
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* @brief Set the Control Register value
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*
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* @param control Control value
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*
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* Set the control register
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*/
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extern void CMSIS_set_CONTROL(uint32_t control);
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#else /* (__ARMCC_VERSION >= 400000) */
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/**
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* @brief Remove the exclusive lock created by ldrex
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*
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* Removes the exclusive lock which is created by ldrex.
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*/
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#define CMSIS_CLREX __clrex
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/**
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* @brief Return the Base Priority value
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*
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* @return BasePriority
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*
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* Return the content of the base priority register
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*/
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static __INLINE uint32_t CMSIS_get_BASEPRI(void)
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{
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register uint32_t __regBasePri __ASM("basepri");
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return(__regBasePri);
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}
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/**
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* @brief Set the Base Priority value
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*
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* @param basePri BasePriority
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*
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* Set the base priority register
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*/
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static __INLINE void CMSIS_set_BASEPRI(uint32_t basePri)
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{
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register uint32_t __regBasePri __ASM("basepri");
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__regBasePri = (basePri & 0xff);
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}
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/**
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* @brief Return the Priority Mask value
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*
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* @return PriMask
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*
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* Return state of the priority mask bit from the priority mask register
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*/
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static __INLINE uint32_t CMSIS_get_PRIMASK(void)
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{
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register uint32_t __regPriMask __ASM("primask");
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return(__regPriMask);
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}
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/**
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* @brief Set the Priority Mask value
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*
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* @param priMask PriMask
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*
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* Set the priority mask bit in the priority mask register
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*/
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static __INLINE void CMSIS_set_PRIMASK(uint32_t priMask)
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{
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register uint32_t __regPriMask __ASM("primask");
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__regPriMask = (priMask);
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}
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/**
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* @brief Return the Fault Mask value
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*
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* @return FaultMask
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*
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* Return the content of the fault mask register
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*/
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static __INLINE uint32_t CMSIS_get_FAULTMASK(void)
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{
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register uint32_t __regFaultMask __ASM("faultmask");
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return(__regFaultMask);
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}
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/**
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* @brief Set the Fault Mask value
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*
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* @param faultMask faultMask value
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*
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* Set the fault mask register
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*/
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static __INLINE void CMSIS_set_FAULTMASK(uint32_t faultMask)
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{
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register uint32_t __regFaultMask __ASM("faultmask");
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__regFaultMask = (faultMask & 1);
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}
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/**
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* @brief Return the Control Register value
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*
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* @return Control value
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*
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* Return the content of the control register
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*/
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static __INLINE uint32_t CMSIS_get_CONTROL(void)
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{
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register uint32_t __regControl __ASM("control");
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return(__regControl);
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}
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/**
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* @brief Set the Control Register value
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*
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* @param control Control value
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*
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* Set the control register
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*/
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static __INLINE void CMSIS_set_CONTROL(uint32_t control)
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{
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register uint32_t __regControl __ASM("control");
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__regControl = control;
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}
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#endif /* __ARMCC_VERSION */
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#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
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/* IAR iccarm specific functions */
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#define CMSIS_enable_irq __enable_interrupt /*!< global Interrupt enable */
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#define CMSIS_disable_irq __disable_interrupt /*!< global Interrupt disable */
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static __INLINE void CMSIS_enable_fault_irq() { __ASM ("cpsie f"); }
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static __INLINE void CMSIS_disable_fault_irq() { __ASM ("cpsid f"); }
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#define CMSIS_NOP __no_operation /*!< no operation intrinsic in IAR Compiler */
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static __INLINE void CMSIS_WFI() { __ASM ("wfi"); }
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static __INLINE void CMSIS_WFE() { __ASM ("wfe"); }
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static __INLINE void CMSIS_SEV() { __ASM ("sev"); }
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static __INLINE void CMSIS_CLREX() { __ASM ("clrex"); }
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/* intrinsic void CMSIS_ISB(void) */
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/* intrinsic void CMSIS_DSB(void) */
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/* intrinsic void CMSIS_DMB(void) */
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/* intrinsic void CMSIS_set_PRIMASK(); */
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/* intrinsic void CMSIS_get_PRIMASK(); */
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/* intrinsic void CMSIS_set_FAULTMASK(); */
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/* intrinsic void CMSIS_get_FAULTMASK(); */
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/* intrinsic uint32_t CMSIS_REV(uint32_t value); */
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/* intrinsic uint32_t CMSIS_REVSH(uint32_t value); */
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/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */
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/* intrinsic unsigned long __LDREX(unsigned long *); */
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/**
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* @brief Return the Process Stack Pointer
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*
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* @return ProcessStackPointer
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*
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* Return the actual process stack pointer
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*/
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extern uint32_t CMSIS_get_PSP(void);
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/**
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* @brief Set the Process Stack Pointer
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*
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* @param topOfProcStack Process Stack Pointer
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*
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* Assign the value ProcessStackPointer to the MSP
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* (process stack pointer) Cortex processor register
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*/
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extern void CMSIS_set_PSP(uint32_t topOfProcStack);
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/**
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* @brief Return the Main Stack Pointer
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*
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* @return Main Stack Pointer
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*
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* Return the current value of the MSP (main stack pointer)
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* Cortex processor register
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*/
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extern uint32_t CMSIS_get_MSP(void);
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/**
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* @brief Set the Main Stack Pointer
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*
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* @param topOfMainStack Main Stack Pointer
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*
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* Assign the value mainStackPointer to the MSP
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* (main stack pointer) Cortex processor register
|
||
|
|
*/
|
||
|
|
extern void CMSIS_set_MSP(uint32_t topOfMainStack);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Reverse byte order in unsigned short value
|
||
|
|
*
|
||
|
|
* @param value value to reverse
|
||
|
|
* @return reversed value
|
||
|
|
*
|
||
|
|
* Reverse byte order in unsigned short value
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_REV16(uint16_t value);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Reverse bit order of value
|
||
|
|
*
|
||
|
|
* @param value value to reverse
|
||
|
|
* @return reversed value
|
||
|
|
*
|
||
|
|
* Reverse bit order of value
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_RBIT(uint32_t value);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief LDR Exclusive (8 bit)
|
||
|
|
*
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return value of (*address)
|
||
|
|
*
|
||
|
|
* Exclusive LDR command for 8 bit values)
|
||
|
|
*/
|
||
|
|
extern uint8_t CMSIS_LDREXB(uint8_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief LDR Exclusive (16 bit)
|
||
|
|
*
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return value of (*address)
|
||
|
|
*
|
||
|
|
* Exclusive LDR command for 16 bit values
|
||
|
|
*/
|
||
|
|
extern uint16_t CMSIS_LDREXH(uint16_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief LDR Exclusive (32 bit)
|
||
|
|
*
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return value of (*address)
|
||
|
|
*
|
||
|
|
* Exclusive LDR command for 32 bit values
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_LDREXW(uint32_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief STR Exclusive (8 bit)
|
||
|
|
*
|
||
|
|
* @param value value to store
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return successful / failed
|
||
|
|
*
|
||
|
|
* Exclusive STR command for 8 bit values
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_STREXB(uint8_t value, uint8_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief STR Exclusive (16 bit)
|
||
|
|
*
|
||
|
|
* @param value value to store
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return successful / failed
|
||
|
|
*
|
||
|
|
* Exclusive STR command for 16 bit values
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_STREXH(uint16_t value, uint16_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief STR Exclusive (32 bit)
|
||
|
|
*
|
||
|
|
* @param value value to store
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return successful / failed
|
||
|
|
*
|
||
|
|
* Exclusive STR command for 32 bit values
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_STREXW(uint32_t value, uint32_t *addr);
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
|
||
|
|
/* GNU gcc specific functions */
|
||
|
|
|
||
|
|
static __INLINE void CMSIS_enable_irq() { __ASM volatile ("cpsie i"); }
|
||
|
|
static __INLINE void CMSIS_disable_irq() { __ASM volatile ("cpsid i"); }
|
||
|
|
|
||
|
|
static __INLINE void CMSIS_enable_fault_irq() { __ASM volatile ("cpsie f"); }
|
||
|
|
static __INLINE void CMSIS_disable_fault_irq() { __ASM volatile ("cpsid f"); }
|
||
|
|
|
||
|
|
static __INLINE void CMSIS_NOP() { __ASM volatile ("nop"); }
|
||
|
|
static __INLINE void CMSIS_WFI() { __ASM volatile ("wfi"); }
|
||
|
|
static __INLINE void CMSIS_WFE() { __ASM volatile ("wfe"); }
|
||
|
|
static __INLINE void CMSIS_SEV() { __ASM volatile ("sev"); }
|
||
|
|
static __INLINE void CMSIS_ISB() { __ASM volatile ("isb"); }
|
||
|
|
static __INLINE void CMSIS_DSB() { __ASM volatile ("dsb"); }
|
||
|
|
static __INLINE void CMSIS_DMB() { __ASM volatile ("dmb"); }
|
||
|
|
static __INLINE void CMSIS_CLREX() { __ASM volatile ("clrex"); }
|
||
|
|
|
||
|
|
extern uint32_t CMSIS_get_IPSR(void);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Return the Process Stack Pointer
|
||
|
|
*
|
||
|
|
* @return ProcessStackPointer
|
||
|
|
*
|
||
|
|
* Return the actual process stack pointer
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_get_PSP(void);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Set the Process Stack Pointer
|
||
|
|
*
|
||
|
|
* @param topOfProcStack Process Stack Pointer
|
||
|
|
*
|
||
|
|
* Assign the value ProcessStackPointer to the MSP
|
||
|
|
* (process stack pointer) Cortex processor register
|
||
|
|
*/
|
||
|
|
extern void CMSIS_set_PSP(uint32_t topOfProcStack);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Return the Main Stack Pointer
|
||
|
|
*
|
||
|
|
* @return Main Stack Pointer
|
||
|
|
*
|
||
|
|
* Return the current value of the MSP (main stack pointer)
|
||
|
|
* Cortex processor register
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_get_MSP(void);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Set the Main Stack Pointer
|
||
|
|
*
|
||
|
|
* @param topOfMainStack Main Stack Pointer
|
||
|
|
*
|
||
|
|
* Assign the value mainStackPointer to the MSP
|
||
|
|
* (main stack pointer) Cortex processor register
|
||
|
|
*/
|
||
|
|
extern void CMSIS_set_MSP(uint32_t topOfMainStack);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Return the Base Priority value
|
||
|
|
*
|
||
|
|
* @return BasePriority
|
||
|
|
*
|
||
|
|
* Return the content of the base priority register
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_get_BASEPRI(void);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Set the Base Priority value
|
||
|
|
*
|
||
|
|
* @param basePri BasePriority
|
||
|
|
*
|
||
|
|
* Set the base priority register
|
||
|
|
*/
|
||
|
|
extern void CMSIS_set_BASEPRI(uint32_t basePri);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Return the Priority Mask value
|
||
|
|
*
|
||
|
|
* @return PriMask
|
||
|
|
*
|
||
|
|
* Return state of the priority mask bit from the priority mask register
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_get_PRIMASK(void);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Set the Priority Mask value
|
||
|
|
*
|
||
|
|
* @param priMask PriMask
|
||
|
|
*
|
||
|
|
* Set the priority mask bit in the priority mask register
|
||
|
|
*/
|
||
|
|
extern void CMSIS_set_PRIMASK(uint32_t priMask);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Return the Fault Mask value
|
||
|
|
*
|
||
|
|
* @return FaultMask
|
||
|
|
*
|
||
|
|
* Return the content of the fault mask register
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_get_FAULTMASK(void);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Set the Fault Mask value
|
||
|
|
*
|
||
|
|
* @param faultMask faultMask value
|
||
|
|
*
|
||
|
|
* Set the fault mask register
|
||
|
|
*/
|
||
|
|
extern void CMSIS_set_FAULTMASK(uint32_t faultMask);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Return the Control Register value
|
||
|
|
*
|
||
|
|
* @return Control value
|
||
|
|
*
|
||
|
|
* Return the content of the control register
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_get_CONTROL(void);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Set the Control Register value
|
||
|
|
*
|
||
|
|
* @param control Control value
|
||
|
|
*
|
||
|
|
* Set the control register
|
||
|
|
*/
|
||
|
|
extern void CMSIS_set_CONTROL(uint32_t control);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Reverse byte order in integer value
|
||
|
|
*
|
||
|
|
* @param value value to reverse
|
||
|
|
* @return reversed value
|
||
|
|
*
|
||
|
|
* Reverse byte order in integer value
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_REV(uint32_t value);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Reverse byte order in unsigned short value
|
||
|
|
*
|
||
|
|
* @param value value to reverse
|
||
|
|
* @return reversed value
|
||
|
|
*
|
||
|
|
* Reverse byte order in unsigned short value
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_REV16(uint16_t value);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||
|
|
*
|
||
|
|
* @param value value to reverse
|
||
|
|
* @return reversed value
|
||
|
|
*
|
||
|
|
* Reverse byte order in signed short value with sign extension to integer
|
||
|
|
*/
|
||
|
|
extern int32_t CMSIS_REVSH(int16_t value);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Reverse bit order of value
|
||
|
|
*
|
||
|
|
* @param value value to reverse
|
||
|
|
* @return reversed value
|
||
|
|
*
|
||
|
|
* Reverse bit order of value
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_RBIT(uint32_t value);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief LDR Exclusive (8 bit)
|
||
|
|
*
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return value of (*address)
|
||
|
|
*
|
||
|
|
* Exclusive LDR command for 8 bit value
|
||
|
|
*/
|
||
|
|
extern uint8_t CMSIS_LDREXB(uint8_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief LDR Exclusive (16 bit)
|
||
|
|
*
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return value of (*address)
|
||
|
|
*
|
||
|
|
* Exclusive LDR command for 16 bit values
|
||
|
|
*/
|
||
|
|
extern uint16_t CMSIS_LDREXH(uint16_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief LDR Exclusive (32 bit)
|
||
|
|
*
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return value of (*address)
|
||
|
|
*
|
||
|
|
* Exclusive LDR command for 32 bit values
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_LDREXW(uint32_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief STR Exclusive (8 bit)
|
||
|
|
*
|
||
|
|
* @param value value to store
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return successful / failed
|
||
|
|
*
|
||
|
|
* Exclusive STR command for 8 bit values
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_STREXB(uint8_t value, uint8_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief STR Exclusive (16 bit)
|
||
|
|
*
|
||
|
|
* @param value value to store
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return successful / failed
|
||
|
|
*
|
||
|
|
* Exclusive STR command for 16 bit values
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_STREXH(uint16_t value, uint16_t *addr);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief STR Exclusive (32 bit)
|
||
|
|
*
|
||
|
|
* @param value value to store
|
||
|
|
* @param *addr address pointer
|
||
|
|
* @return successful / failed
|
||
|
|
*
|
||
|
|
* Exclusive STR command for 32 bit values
|
||
|
|
*/
|
||
|
|
extern uint32_t CMSIS_STREXW(uint32_t value, uint32_t *addr);
|
||
|
|
|
||
|
|
|
||
|
|
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
|
||
|
|
/* TASKING carm specific functions */
|
||
|
|
|
||
|
|
/*
|
||
|
|
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||
|
|
* Please use "carm -?i" to get an up to date list of all instrinsics,
|
||
|
|
* Including the CMSIS ones.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
|
||
|
|
#endif /*INCLUDED_CMSIS_H*/
|