RTOS/CPU/QingKeV3/qkv3.h

#ifndef INCLUDED_QKV3_H
#define INCLUDED_QKV3_H


#ifndef INCLUDED_OS_TYPES_H
#include <os_types.h>
#endif /*INCLUDED_OS_TYPES_H*/

#ifndef INCLUDED_OS_COMPILER_H
#include <os_compiler.h>
#endif /*INCLUDED_OS_COMPILER_H*/

#ifndef INCLUDED_RISCV_H
#include <riscv.h>
#endif /*INCLUDED_RISCV_H*/


/* ------------------------------------------------------------------------------------------------------------------ */
/*  */

#ifdef __cplusplus
#define     __I     volatile                /*   defines 'read only' permissions     */
#else
#define     __I     volatile const          /*   defines 'read only' permissions     */
#endif
#define     __O     volatile                /*   defines 'write only' permissions    */
#define     __IO    volatile                /*   defines 'read / write' permissions  */


/* ------------------------------------------------------------------------------------------------------------------ */
/*  */

#define QKV3_PFIC            ((QKV3_PFIC_Type *) 0xE000E000 )
#define QKV3_NVIC            QKV3_PFIC
#define QKV3_NVIC_KEY1       ((uint32_t)0xFA050000)
#define	QKV3_NVIC_KEY2		 ((uint32_t)0xBCAF0000)
#define	QKV3_NVIC_KEY3		 ((uint32_t)0xBEEF0000)

#define QKV3_SysTick         ((QKV3_SysTick_Type *) 0xE000F000)



/* ------------------------------------------------------------------------------------------------------------------ */
/*  */

typedef enum {QKV3_NoREADY = 0, QKV3_READY = !QKV3_NoREADY} QKV3_ErrorStatus;

typedef enum {QKV3_DISABLE = 0, QKV3_ENABLE = !QKV3_DISABLE} QKV3_FunctionalState;

typedef enum {QKV3_RESET = 0, QKV3_SET = !QKV3_RESET} QKV3_FlagStatus, QKV3_ITStatus;

/* memory mapped structure for Program Fast Interrupt Controller (PFIC) */
typedef struct{
    __I  uint32_t ISR[8];
    __I  uint32_t IPR[8];
    __IO uint32_t ITHRESDR;
    __IO uint32_t VTFBADDRR;
    __IO uint32_t CFGR;
    __I  uint32_t GISR;
    uint8_t RESERVED0[0x10];
    __IO uint32_t VTFADDRR[4];
    uint8_t RESERVED1[0x90];
    __O  uint32_t IENR[8];
    uint8_t RESERVED2[0x60];
    __O  uint32_t IRER[8];
    uint8_t RESERVED3[0x60];
    __O  uint32_t IPSR[8];
    uint8_t RESERVED4[0x60];
    __O  uint32_t IPRR[8];
    uint8_t RESERVED5[0x60];
    __IO uint32_t IACTR[8];
    uint8_t RESERVED6[0xE0];
    __IO uint8_t IPRIOR[256];
    uint8_t RESERVED7[0x810];
    __IO uint32_t SCTLR;
}QKV3_PFIC_Type;

/* memory mapped structure for SysTick */
typedef struct
{
    __IO uint32_t CTLR;
    __IO uint8_t CNTL0;
    __IO uint8_t CNTL1;
    __IO uint8_t CNTL2;
    __IO uint8_t CNTL3;
    __IO uint8_t CNTH0;
    __IO uint8_t CNTH1;
    __IO uint8_t CNTH2;
    __IO uint8_t CNTH3;
    __IO uint8_t CMPLR0;
    __IO uint8_t CMPLR1;
    __IO uint8_t CMPLR2;
    __IO uint8_t CMPLR3;
    __IO uint8_t CMPHR0;
    __IO uint8_t CMPHR1;
    __IO uint8_t CMPHR2;
    __IO uint8_t CMPHR3;
}QKV3_SysTick_Type;

/* ------------------------------------------------------------------------------------------------------------------ */
/*  */

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_EnableIRQ(uint32_t IRQn)
{
    QKV3_NVIC->IENR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_DisableIRQ(uint32_t IRQn)
{
    uint32_t t;

    t = QKV3_NVIC->ITHRESDR;
    QKV3_NVIC->ITHRESDR = 0x10;
    QKV3_NVIC->IRER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
    QKV3_NVIC->ITHRESDR = t;
}

OS_STATIC_FORCE_INLINE
uint32_t QKV3_NVIC_GetStatusIRQ(uint32_t IRQn)
{
    return((uint32_t) ((QKV3_NVIC->ISR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}

OS_STATIC_FORCE_INLINE
uint32_t QKV3_NVIC_GetPendingIRQ(uint32_t IRQn)
{
    return((uint32_t) ((QKV3_NVIC->IPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_SetPendingIRQ(uint32_t IRQn)
{
    QKV3_NVIC->IPSR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_ClearPendingIRQ(uint32_t IRQn)
{
    QKV3_NVIC->IPRR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
}

OS_STATIC_FORCE_INLINE
uint32_t QKV3_NVIC_GetActive(uint32_t IRQn)
{
    return((uint32_t)((QKV3_NVIC->IACTR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_SetPriority(uint32_t IRQn, uint8_t priority)
{
    QKV3_NVIC->IPRIOR[(uint32_t)(IRQn)] = priority;
}

OS_STATIC_FORCE_INLINE
void QKV3_WFI(void)
{
    QKV3_NVIC->SCTLR &= ~(1<<3);	// wfi
    asm volatile ("wfi");
}

OS_STATIC_FORCE_INLINE
void QKV3_SEV(void)
{
    QKV3_NVIC->SCTLR |= (1<<3)|(1<<5);
}

OS_STATIC_FORCE_INLINE
void QKV3_WFE(void)
{
    QKV3_NVIC->SCTLR |= (1<<3);
    asm volatile ("wfi");
}

OS_STATIC_FORCE_INLINE
void QKV3__WFE(void)
{
    QKV3_SEV();
    QKV3_WFE();
    QKV3_WFE();
}

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_SetFastIRQ(uint32_t addr, uint32_t IRQn, uint8_t num)
{
    if(num > 3)  return ;
    QKV3_NVIC->VTFBADDRR = addr;
    QKV3_NVIC->VTFADDRR[num] = ((uint32_t)IRQn<<24)|(addr&0xfffff);
}

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_SystemReset(void)
{
    QKV3_NVIC->CFGR = QKV3_NVIC_KEY3|(1<<7);
}

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_HaltPushCfg(QKV3_FunctionalState NewState)
{
    if (NewState != QKV3_DISABLE)
    {
        QKV3_NVIC->CFGR = QKV3_NVIC_KEY1;
    }
    else
    {
        QKV3_NVIC->CFGR = QKV3_NVIC_KEY1|(1<<0);
    }
}

OS_STATIC_FORCE_INLINE
void QKV3_NVIC_INTNestCfg(QKV3_FunctionalState NewState)
{
    if (NewState != QKV3_DISABLE)
    {
        QKV3_NVIC->CFGR = QKV3_NVIC_KEY1;
    }
    else
    {
        QKV3_NVIC->CFGR = QKV3_NVIC_KEY1|(1<<1);
    }
}



#endif /*INCLUDED_QKV3_H*/